Product Details
Description
The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP,pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5, -6, -7, and -10 speed grades as well as MAX 7000 and MAX 7000E devices in -5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2. See Table 3 for available speed grades.
Features
■ High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX®architecture
■ 5.0-V in-system programmability(ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices
– ISP circuitry compatible with IEEE Std. 1532
■ Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices
■ Built-in JTAG boundary-scan test (BST) circuitry in MAX7000S devices with 128 or more macrocells
■ Complete EPLD family with logic densities ranging from 600 to 5,000 usable gates (see Tables 1and 2)
■ 5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect)
■ PCI-compliant devices available
Specifications
| Attribute | Attribute Value |
| Manufacturer | Intel / Altera |
| Product Category | Touch Screen Controllers |
| Series | MAX® 7000S |
| Product | MAX 7000 |
| Packaging | Tray |
| Unit-Weight | 0.239083 oz |
| Mounting-Style | SMD/SMT |
| Tradename | MAX 7000 |
| Package-Case | 84-LCC (J-Lead) |
| Operating-Temperature | 0°C ~ 70°C (TA) |
| Mounting-Type | Surface Mount |
| Supplier-Device-Package | 84-PLCC (29.31x29.31) |
| Memory-Type | EEPROM |
| Programmable-Type | In System Programmable |
| Delay-Time-tpd-1-Max | 6.0ns |
| Voltage-Supply-Internal | 4.75 V ~ 5.25 V |
| Number-of-Logic-Elements-Blocks | 8 |
| Number-of-Macrocells | 128 Macrocells |
| IC Number of Gates | 2500 |
| Number-of-I-O | 68 I/O |
| Maximum Operating Temperature | + 70 C |
| Operating temperature range | 0 C |
| Operating-Supply-Voltage | 3.3 V |
| Maximum-Operating-Frequency | 147.1 MHz |
| Supply-Voltage-Max | 3.6 V |
| Supply-Voltage-Min | 3 V |
| Package-Case | PLCC-84 |
| Propagation-Delay-Max | 6 ns |
| Input/output | 68 I/O |
| Number-of-Logic-Array-Blocks-LABs | 8 |
Form,Package,Functional compatible component
Descriptions
IC CPLD 128MC 6NS 84PLCC
CPLD MAX庐 7000S Family 2.5K Gates 128 Macro Cells 147.1MHz 5V 84-Pin PLCC Tray
CPLD - Complex Programmable Logic Devices CPLD - MAX 7000 128 Macro 68 IOs
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FAQ
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A: We are original manufacturer OF Integrated Circuit Chip . We can do OEM/ODM business.
Q: How long is your delivery time?
A: Group buying delivery time: 30-60 days; General delivery time: 20 days.
Q: What is your terms of payment?
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A: The free warranty is one year from the day of Commissioning qualified.If there is any fault for our products within the free warranty period, we will repair it and change the fault assembly for free
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EPM7128SLC84-6 CPLD - Complex Programmable Logic Devices CPLD - MAX 7000 128 Macro 68 IOs Images
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